Computers are known to include a central processing unit (CPU), main memory, interconnecting buses, and video graphics circuitry. The tasks that a computer can process have increased proportionally with the increase in processing power and memory storage capabilities. Furthermore, as the number of tasks increase, systems are required to operate more quickly and efficiently, including the manner in which processing commands are transmitted and executed within the system.
When a command processor receives system commands from a command buffer, the processor provides these commands to be executed by the specific engines, such as a video rendering engine, a direct memory access (DMA), or a display device. The command buffer usually acts within a first-in first-out (FIFO) order. Therefore as a new command is provided from a host, all previous commands already within the buffer must be processed before the new command is executed.
A problem arises when a specific command needs to be executed, at a specific time or in relation to another executed command. Often times, when a specific command or external event occurs, the system will seek to execute a related command usually related to the previous command or the external event. In a conventional command processing system, the first-in first-out processing steps prevent the related command from being processed until all other commands within the queue or buffer are executed.
To overcome the problem of a specific command needing to be executed within a specific time, typically, systems have been developed having multiple command buffers having variant priority levels. Within the multiple priority buffer system, a specific command can be labeled with a priority tag. The priority tag then determines from which command buffer the command processor receives the processing command. For example, the system may choose to execute all high priority commands when the system processor determines the system is operating at a peak state, and then may choose to execute the low priority commands when the system is more capable to execute the lower priority commands. The multiple priority command buffer systems fail to provide for the synchronization of multiple events, the system must choose to execute low or high priority events, but cannot synchronize the occurrence of a specific high priority event with a specific low priority event or multiple high priority or low priority events.
In an attempt to provide synchronization between multiple commands, another solution is the insertion of a wait-until step within the command processing system. Typically, these systems will execute a specific command, and then stall the command processor until a specific event occurs. A problem occurs when a command processing unit is subject to a wait-until command, the processing system is essentially stalled until the event occurs, thus creating an inefficient processing system and can thereby substantially reduce the speed of the processing system. As such, synchronization may be achieved, but at the cost of processing efficiency.
Moreover, typically this system can only handle a single specific synchronization through the execution of multiple commands, at one time. Therefore, the processing system is extremely limited when multiple wait-until event scenarios arise.
Consequently, there exist a need for a command processing system whereupon the occurrence of multiple events may be properly synchronized without reducing system efficiency.